EATMT – Extended finite-state automaton

Block SymbolLicensing group: ADVANCED
Qt SVG Document Exported by REXYGEN Studio R1 ns0 SET HLD c0 c1 c2 c3 c4 c5 c6 c7 c8 c9 c10 c11 c12 c13 c14 c15 q0 q1 q2 q3 q4 q5 q6 q7 q8 q9 q10 q11 q12 q13 q14 q15 ksa tstep TOUT EATMT

Function Description
The EATMT block implements a finite automat with at most 256 states and 256 transition rules, thus it extends the possibilities of the ATMT block.

The current state of the automat i, i = 0,1,,255 is indicated by individual bits of the integer outputs q0, q1, …, q15. Only a single bit with index iMOD16 of the q(iDIV16) output is set to 1. The remaining bits of that output and the other outputs are zero. The bits are numbered from zero, least significant bit first. Note that the DIV and MOD operators denote integer division and remainder after integer division respectively. The current state is also indicated by the ksa {0,1,,255} output.

The transition conditions Ck, k = 0,1,,255) are activated by individual bits of the inputs c0, c1, …, c15. The k-th transition condition is fulfilled when the (kMOD16)-th bit of the input c(kDIV16) is equal to 1. The transition cannot happen otherwise.

The BMHEXD or BMOCT bitwise multiplexers can be used for composition of the input signals c0, c1, …, c15 from individual Boolean signals. Similarly the output signals q0, q1, …, q15 can be decomposed using the BDHEXD or BDOCT bitwise demultiplexers.

The automat function is defined by the following table of transitions:

S1 C1 FS1
S2 C2 FS2
Sn Cn FSn

Each row of this table represents one transition rule. For example the first row

S1 C1 FS1

has the meaning

If (S1 is the current state AND transition condition C1 is fulfilled),
then proceed to the following state FS1.

The above described meaning of the table row holds for C1 < 1000. Negation of the (C1 1000)-th transition condition is assumed for C1 1000.

The above mentioned table can be easily constructed from the automat state diagram or SFC description (Sequential Function Charts, formerly Grafcet).

The R1 = on input resets the automat to the initial state S0. The SET input allows manual transition from the current state to the ns0 state when rising edge occurs. The R1 input overpowers the SET input. The HLD = on input freezes the automat activity, the automat stays in the current state regardless of the ci input signals and the tstep timer is not incremented. The TOUT output indicates that the machine remains in the given state longer than expected. The time limits TOi for individual states are defined by the touts array. There is no time limit for the given state when TOi is set to zero. The TOUT output is set to off whenever the automat changes its state.

It is possible to allow more state transitions in one cycle by the morestps parameter. However, this option must be thoroughly considered and tested, namely when the TOUT output is used in transition conditions. In such a case it is strongly recommended to incorporate the ksa output in the transition conditions as well.

The development tools of REXYGEN include also the SFCEditor program. You can create SFC schemes graphically using this tool. Run this editor from REXYGEN Studio by clicking the Configure button in the parameter dialog of the EATMT block.

This block propagates the signal quality. More information can be found in the 1.4 section.

Input

R1

Block reset

Bool

ns0

Target state forced by the SET input

Long (I32)

SET

Forced transition to state ns0

Bool

HLD

Hold

Bool

c0..c15

Transition condition

Long (I32)

Parameter

morestps

Allow multiple transitions in one cycle

Bool

off ..

Disabled

on ...

Enabled

sfcname

Name of special editor data file

String

STT

State transition table  [0 0 1; 1 1 2; 2 2 3; 3 3 0]

Short (I16)

touts

Vector of timeouts  [1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16]

Double (F64)

Output

q0..q15

Active state indicator

Long (I32)

ksa

Integer code of the active state

Long (I32)

tstep

Time elapsed since the last state transition

Double (F64)

TOUT

Timeout flag

Bool

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