Inport, Outport – Input and output port

Block SymbolsLicensing group: STANDARD

Function Description
The Inport and Outport blocks are used for connecting signals over individual hierarchical levels. There are two possible ways to use these blocks in the REXYGEN system:

1. To connect inputs and outputs of the subsystem. The blocks create an interface between the symbol of the subsystem and its inner algorithm (sequence of blocks contained in the subsystem). The Inport or Outport blocks are located inside the subsystem, the name of the given port is displayed in the subsystem symbol in the upper hierarchy level.
2. To provide connection between various tasks. The port blocks are located in the highest hierarchy level of the given task (.mdl file) in this case. The corresponding Inport and Outport blocks should have the same Block name. The connection between blocks in various tasks is checked and created by the REXYGEN Compiler compiler.

The ordering of the blocks to be connected is based on the Port parameter of the given block. The numberings of the input and output ports are independent on each other. The numbering is automatic in REXYGEN Studio and it starts at 1. The numbers of ports must be unique in the given hierarchy level, in case of manual modification of the port number the other ports are re-numbered automatically. Be aware that after re-numbering in an already connected subsystem the inputs (or outputs) in the upper hierarchy level are re-ordered, which results in probably unintended change in signal mapping!

In the Inport and Outport blocks, it’s also possible to explicitly specify the data type of the transferred value using the OutDataTypeStr parameter. If no value is selected, or the option Inherit: auto is chosen, the value type is determined automatically.

The Description parameter can be used to add a textual description of the block. This description is displayed in the properties of the subsystem and library block if Inport or Outport is used to define the inputs and outputs of the subsystem.

Warning: The blocks Inport and Outport should not be use to connect arrays and other references between tasks (references often have ref in name and have a type intptr in the Diagnostics section of the REXYGEN Studio program). Consistence is not guaranteed in this case; incorrect value could be get and runtime code can crash in worst case scenario. Typical behaviour is that some array members are from one period of execution and other members of array from next period.The blocks SETPA and GETPA ensure consistent read and write of the array between task. Some blocks guarantee consistence of references over task boundary (for example RM_AxisSpline). In this case, this is explicitly stated in the block manual.

This block does not propagate the signal quality. More information can be found in the 1.4 section.

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